Performance tests of a new fast digitiser for beam diagnostic applications

A new type of PCI-based fast digitisers has been deployed to implement new beam diagnostic systems and as a prototype for a new family of applications. The modules selected for the first tests and applications are the Acqiris DC265 fast digitiser boards, characterised by a high sampling speed, a large amount of memory per channel (2 MSamples per channel as the chosen option) and a PCI bus interface. This note details the tests carried out, and the results obtained, to ascertain the DC265 board and crate suitability to general beam diagnostics applications

The LEIR LLRF DSP-Carrier Board : Performance, CPS Renovation Plan and Recommendations

The LEIR LLRF project started in late 2003 and included designing,manufacturing and commissioning a novel, all-digital beam control system. The project was first to provide the LEIR machine with a beam control system satisfying the many performance requirements. This was achieved in 2006 with the successful LEIR LLRF system commissioning. In addition, the project was to act as a pilot to export the same technology to the other machines of the PS Complex (CPS), such as PS, PSB and AD. New machines currently being proposed (e.g. ELENA) will also rely on it. The evaluation of the LEIR experience and the recommendations on how to best pursue this migration strategy are therefore integral parts of the LEIR LLRF project. A fundamental building block of the LEIR LLRF system is the DSP-carrier board where all beam control loops are implemented. This note examines the main features of the DSP-carrier board release 1.0 used in LEIR and evaluates their impact on the LEIR LLRF implementation and operational performance. An outline of the intermediate release 1.bis, currently under way, is given. The requirements for a future DSP-carrier board release 2 are outlined, as they were discussed and planned since 2004. The benefits of this new implementation are evaluated and it is recommended that this DSP-carrier board release be studied, designed and manufactured, particularly in view of ever more demanding RF gymnastics and requirements from the different CPS accelerators

Digital signal processor fundamentals and system design

Digital Signal Processors (DSPs) have been used in accelerator systems for more than fifteen years and have largely contributed to the evolution towards digital technology of many accelerator systems, such as machine protection, diagnostics and control of beams, power supply and motors. This paper aims at familiarising the reader with DSP fundamentals, namely DSP characteristics and processing development. Several DSP examples are given, in particular on Texas Instruments DSPs, as they are used in the DSP laboratory companion of the lectures this paper is based upon. The typical system design flow is described; common difficulties, problems and choices faced by DSP developers are outlined; and hints are given on the best solution

The DSP-Carrier Board Used by the LEIR Low-Level RF System: User's Manual

A new digital technology to implement beam control systems was tested in the PS Booster in 2004 and 2005 and commissioned in LEIR in 2006. The technology is based upon RF custom hardware that heavily exploits Digital Signal Processors (DSPs) and Field Programmable Gate Arrays (FPGAs) processing power. This architecture is extremely flexible in that it relies on a DSP-carrier board hosting one DSP and carrying different daughtercards. The LEIR beam control system deploys three DSP-carrier boards, which inter-communicate and exchange data continuously for the implementation of the various beam control loops. This user's manual for the DSP-carrier board, release 1.0 (EDA-00990-V1), was written in 2004 and has been used by CERN and BNL developers since then. It describes the DSP-carrier board hardware, user settings and FPGA software; hints on the DSP code used with the board are also given. An additional VME board, called Rear Transition Module, is described because it acts as a DSP-carrier board extension

ELENA, a preliminary cost and feasibility study

To produce dense pbar beams at very low energies (100-200 keV), a small decelerator ring could be built and installed between the existing AD ring and the experimental area. Phase-space blowup during deceleration would be compensated by electron cooling in order to obtain final emittances comparable to the 5MeV beam presently delivered by the AD. This report describes preliminary machine parameters and layout of ELENA and also gives an approximate estimate of cost and manpower needs

First Beam Commissioning of the 400 MHz LHC RF System

Hardware commissioning of the LHC RF system was successfully completed in time for first beams in LHC in September 2008. All cavities ware conditioned to nominal field, power systems tested and all Low level synchronization systems, cavity controllers and beam control electronics were tested and calibrated. Beam was successfully captured in ring 2, cavities phased, and a number of initial measurements made. These results are presented and tests and preparation for colliding beams in 2009 are outlined

Ions for LHC: Towards Completion of the Injector Chain

The commissioning of CERN's ion injector complex [1] to allow 1.1 PeV collisions of ions in LHC is well under way. After the Low Energy Ion Ring (LEIR) in 2005 [2] and the Proton Synchrotron (PS) in 2006 [3], the Super Proton Synchrotron (SPS) has now been commissioned with the 'Early' ion beam, which should give a luminosity of $5×10^{25}cm^{-2}s^{-1}$ in the LHC. This paper summarizes the operation in 2007 of all the machines involved in the ion injection chain

PSB LLRF: new features for machine studies and operation in the PSB 2016 run

A new digital Low-Level RF (LLRF) system has beensuccessfully deployed on the four PS Booster (PSB) ringsin June 2014, after the Long-Shutdown 1 (LS1). Althoughonly recently deployed, several new features for machinestudies and operation have already been required and im-plemented. This note provides an overview of the main fea-tures deployed for the 2016 PSB run and of their result